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Monolithic Soc

Given the parameter with values given in Table 2.2, the single-chip implementation (m= 1) of the system has a yield of only 15.0%, making it very cost-inefficient. According to Equation (2.1), the silicon area of the monolithic chip is 26.744 cm2. [Pg.28]


Monolithic SoC can be considered as a special case of 2.5-D system with only one device layer. [Pg.11]


See other pages where Monolithic Soc is mentioned: [Pg.4]    [Pg.28]    [Pg.167]   


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