HDL Coding Examples

This section shows several simple HDL coding examples of commonly used building blocks such as RAMs, ROMs, barrel shifters and incrementors. Examples are provided in both VHDL and Verilog. 

Input [addr width-1 0] addr input [width-1 0] datain output [width-1 0] dataout input elk  

Example 2.14 shows the VHDL and Verilog code for a simple combinational logic block. It is a parametrizable incrementor which can be programmed in either a feedthrough mode or the increment mode. Also there is a flag logic which indicates when the design cotmts to 0 in the incrementor mode. 

Example 2.15 describes a barrel shifter which is capable of shift left or shift right based upon an input control signal. The width of the data bus is 3 bits and the shift coimt bus is S bits wide. Zeros are shifted in when shifting either right or left. 

Example 2.16 HDL Description of a Multi-Bit Register VHDL Code 

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