Application-driven architecture synthesis

Figure 1 Architecture synthesis as viewed within the Ascis and Nana projects. The input from the user is converted to a formal system model which can also be written out in a readable specification format. Different design trajectories must be followed, depending on the characteristics of the application. The figure only shows the two main branches we have addressed. The final high-level performance-driven controller synthesis is similar for both branches. In the next design stages, which have not been addressed by the projects, the detailed synthesis of the data-paths and controllers on the RT and logical levels still has to take place. This is then followed by the physical design stage.

S. Note et al. Cathedral III architecture-driven HL synthesis for high-throughput DSP applications. Proc. 28th DAC, 1991. 

---